Fetch
We start with the instruction fetch, which means we have to load the instruction from memory and forward it to the decoder. For this we take the current address which is stored in the PC register and address it in the ROM. Since our memory is organized byte wise, in order to load the next instruction in the next clock, we only have to increment the current address by 1 and pass it back to the PC register and store it.
However, there are jump instructions that ensure that we do not load the next instruction but the address that was specified in the jump instruction. If we actually jump, this new address is loaded into the PC register. A so-called multiplexer (2-to-1) is used to select the new address. This forwards one of the two input signals. Which signal is forwarded is decided by a control signal which comes from the controller unit.
Read only Memory (ROM)
The read-only memory (ROM), as the name suggests, can only be read and not written to. With a total of one 8-bit bus, we can therefore address 256 bytes. A byte is read when a positive clock edge occurs. As output we have our 16-bit wide instruction.
From now on, all blocks are illustrated with a block diagram, which shows the input and output signals and the corresponding logic code.
Random access memory (RAM)
Finally, our RTL description is transformed into a so-called gate-level netlist using a synthesis tool. This involves taking the RTL description (which formulated the previous circuits using registers, multiplexers, counters, etc.) and mapping it to logic gates. These logic gates are later mapped to transistors during the physical implementation.
Program Counter (PC)
The Program Counter (PC) register consists of a single register, each clock cycle is written with the address for the next clock cycle and outputs the current address. We can also reset the register to the start address 0 using a reset signal. This implies that our programs always start from the start address 0. This does not have to be the case, other processors also start at other addresses.
